64 lines
3.8 KiB
Plaintext
64 lines
3.8 KiB
Plaintext
vendor_name = ModelSim
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source_file = 1, C:/Users/Cai.MY/Desktop/8bit_model/eight_bit_model.bdf
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source_file = 1, C:/Users/Cai.MY/Desktop/8bit_model/accumulator.vhd
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source_file = 1, C:/Users/Cai.MY/Desktop/8bit_model/alu.vhd
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source_file = 1, C:/Users/Cai.MY/Desktop/8bit_model/ir.vhd
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source_file = 1, C:/Users/Cai.MY/Desktop/8bit_model/pc.vhd
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source_file = 1, C:/Users/Cai.MY/Desktop/8bit_model/ar.vhd
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source_file = 1, C:/Users/Cai.MY/Desktop/8bit_model/dr.vhd
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source_file = 1, C:/Users/Cai.MY/Desktop/8bit_model/controller.vhd
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source_file = 1, C:/Users/Cai.MY/Desktop/8bit_model/metronome.vhd
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source_file = 1, C:/Users/Cai.MY/Desktop/8bit_model/code.hex
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source_file = 1, C:/Users/Cai.MY/Desktop/8bit_model/ram0.qip
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source_file = 1, C:/Users/Cai.MY/Desktop/8bit_model/ram0.vhd
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source_file = 1, C:/Users/Cai.MY/Desktop/8bit_model/ax301_ax4010.tcl
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source_file = 1, C:/Users/Cai.MY/Desktop/8bit_model/pll.qip
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source_file = 1, C:/Users/Cai.MY/Desktop/8bit_model/pll.vhd
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source_file = 1, C:/Users/Cai.MY/Desktop/8bit_model/led.vhd
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source_file = 1, C:/Users/Cai.MY/Desktop/8bit_model/Waveform.vwf
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source_file = 1, C:/Users/Cai.MY/Desktop/8bit_model/Waveform1.vwf
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source_file = 1, C:/Users/Cai.MY/Desktop/8bit_model/Waveform2.vwf
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source_file = 1, C:/Users/Cai.MY/Desktop/8bit_model/Waveform3.vwf
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source_file = 1, C:/Users/Cai.MY/Desktop/8bit_model/Waveform4.vwf
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source_file = 1, C:/Users/Cai.MY/Desktop/8bit_model/Waveform5.vwf
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source_file = 1, C:/Users/Cai.MY/Desktop/8bit_model/Waveform6.vwf
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source_file = 1, C:/Users/Cai.MY/Desktop/8bit_model/Waveform7.vwf
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source_file = 1, c:/intelfpga_lite/18.0/quartus/libraries/vhdl/ieee/prmtvs_b.vhd
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source_file = 1, c:/intelfpga_lite/18.0/quartus/libraries/vhdl/ieee/prmtvs_p.vhd
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source_file = 1, c:/intelfpga_lite/18.0/quartus/libraries/vhdl/ieee/timing_b.vhd
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source_file = 1, c:/intelfpga_lite/18.0/quartus/libraries/vhdl/ieee/timing_p.vhd
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source_file = 1, C:/Users/Cai.MY/Desktop/8bit_model/db/8bit_model.cbx.xml
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design_name = hard_block
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design_name = ar
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instance = comp, \addr_out[0]~output\, addr_out[0]~output, ar, 1
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instance = comp, \addr_out[1]~output\, addr_out[1]~output, ar, 1
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instance = comp, \addr_out[2]~output\, addr_out[2]~output, ar, 1
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instance = comp, \addr_out[3]~output\, addr_out[3]~output, ar, 1
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instance = comp, \addr_out[4]~output\, addr_out[4]~output, ar, 1
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instance = comp, \addr_out[5]~output\, addr_out[5]~output, ar, 1
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instance = comp, \addr_out[6]~output\, addr_out[6]~output, ar, 1
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instance = comp, \addr_out[7]~output\, addr_out[7]~output, ar, 1
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instance = comp, \clk~input\, clk~input, ar, 1
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instance = comp, \clk~inputclkctrl\, clk~inputclkctrl, ar, 1
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instance = comp, \addr_in[0]~input\, addr_in[0]~input, ar, 1
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instance = comp, \addr_out[0]~reg0feeder\, addr_out[0]~reg0feeder, ar, 1
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instance = comp, \en_D~input\, en_D~input, ar, 1
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instance = comp, \addr_out[0]~reg0\, addr_out[0]~reg0, ar, 1
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instance = comp, \addr_in[1]~input\, addr_in[1]~input, ar, 1
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instance = comp, \addr_out[1]~reg0\, addr_out[1]~reg0, ar, 1
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instance = comp, \addr_in[2]~input\, addr_in[2]~input, ar, 1
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instance = comp, \addr_out[2]~reg0feeder\, addr_out[2]~reg0feeder, ar, 1
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instance = comp, \addr_out[2]~reg0\, addr_out[2]~reg0, ar, 1
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instance = comp, \addr_in[3]~input\, addr_in[3]~input, ar, 1
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instance = comp, \addr_out[3]~reg0\, addr_out[3]~reg0, ar, 1
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instance = comp, \addr_in[4]~input\, addr_in[4]~input, ar, 1
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instance = comp, \addr_out[4]~reg0feeder\, addr_out[4]~reg0feeder, ar, 1
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instance = comp, \addr_out[4]~reg0\, addr_out[4]~reg0, ar, 1
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instance = comp, \addr_in[5]~input\, addr_in[5]~input, ar, 1
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instance = comp, \addr_out[5]~reg0feeder\, addr_out[5]~reg0feeder, ar, 1
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instance = comp, \addr_out[5]~reg0\, addr_out[5]~reg0, ar, 1
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instance = comp, \addr_in[6]~input\, addr_in[6]~input, ar, 1
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instance = comp, \addr_out[6]~reg0\, addr_out[6]~reg0, ar, 1
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instance = comp, \addr_in[7]~input\, addr_in[7]~input, ar, 1
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instance = comp, \addr_out[7]~reg0\, addr_out[7]~reg0, ar, 1
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